Implementation of MPICH on top of MPLi̲te

dc.contributor.author Selvarajan, Shoba
dc.contributor.department Department of Electrical and Computer Engineering
dc.date 2020-07-24T01:04:32.000
dc.date.accessioned 2021-02-26T08:33:00Z
dc.date.available 2021-02-26T08:33:00Z
dc.date.copyright Tue Jan 01 00:00:00 UTC 2002
dc.date.issued 2002-01-01
dc.description.abstract <p>The goal of this thesis is to develop a new Channel Interface device for the MPICH implementation of the MPI (Message Passing Interface) standard using MPLi̲te. MPLi̲te is a lightweight message-passing library that is not a full MPI implementation, but offers high performance. MPICH (Message Passing Interface CHameleon) is a full implementation of the MPI standard that has the p4 library as the underlying communication device for TCP/IP networks. By integrating MPLi̲te as a Channel Interface device in MPICH, a parallel programmer can utilize the full MPI implementation of MPICH as well as the high bandwidth offered by MPLi̲te. There are several layers in the MPICH library where one can tie a new device. The Channel Interface is the lowest layer that requires very few functions to add a new device. By attaching MPLi̲te to MPICH at the lowest level, the Channel Interface, almost all of the performance of the MPLi̲te library can be delivered to the applications using MPICH. MPLi̲te can be implemented either as a blocking or a non-blocking Channel Interface device. The performance was measured on two separate test clusters, the PC and the Alpha mini-clusters, having Gigabit Ethernet connections. The PC cluster has two 1.8 GHz Pentium 4 PCs and the Alpha cluster has two 500 MHz Compaq DS20 workstations. Different network interface cards like Netgear, TrendNet and SysKonnect Gigabit Ethernet cards were used for the measurements. Both the blocking and non-blocking MPICH-MPLi̲te Channel Interface devices perform close to raw TCP, whereas a performance loss of 25-30% is seen in the MPICH-p4 Channel Interface device for larger messages. The superior performance offered by the MPICH-MPLi̲te device compared to the MPICH-p4 device can be easily seen on the SysKonnect cards using jumbo frames. The throughput curve also improves considerably by increasing the Eager/Rendezvous threshold.</p>
dc.format.mimetype application/pdf
dc.identifier archive/lib.dr.iastate.edu/rtd/19557/
dc.identifier.articleid 20556
dc.identifier.contextkey 18628642
dc.identifier.doi https://doi.org/10.31274/rtd-20200723-10
dc.identifier.s3bucket isulib-bepress-aws-west
dc.identifier.submissionpath rtd/19557
dc.identifier.uri https://dr.lib.iastate.edu/handle/20.500.12876/96924
dc.language.iso en
dc.source.bitstream archive/lib.dr.iastate.edu/rtd/19557/Selvarajan_ISU_2002_S45.pdf|||Fri Jan 14 21:57:46 UTC 2022
dc.subject.keywords Electrical and computer engineering
dc.subject.keywords Computer engineering
dc.title Implementation of MPICH on top of MPLi̲te
dc.type thesis en_US
dc.type.genre thesis en_US
dspace.entity.type Publication
relation.isOrgUnitOfPublication a75a044c-d11e-44cd-af4f-dab1d83339ff
thesis.degree.discipline Computer Engineering
thesis.degree.level thesis
thesis.degree.name Master of Science
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