An offset auto-calibration technique with cost-effective implementation for comparator and operational amplifier

dc.contributor.advisor Degang Chen
dc.contributor.author Gong, Xinyu
dc.contributor.department Electrical and Computer Engineering
dc.date 2019-11-04T21:48:28.000
dc.date.accessioned 2020-06-30T03:18:33Z
dc.date.available 2020-06-30T03:18:33Z
dc.date.copyright Thu Aug 01 00:00:00 UTC 2019
dc.date.embargo 2001-01-01
dc.date.issued 2019-01-01
dc.description.abstract <p>Comparators are one of the most fundamental building blocks in all electronic systems involving analog and digital information. A comparator’s performance, or the accuracy of its output, is determined by the comparator’s offset voltage, which includes random offset and systematic offset. To guarantee the overall performance of an entire electronic system, offset-trimming techniques are often necessary to reduce inaccuracy. This study analyzes the offset errors in a representative comparator structure and describes an auto-calibration technique to systematically and significantly reducing the offset. The auto-calibration technique involves trimming of the comparator input transistor pair. Various trimming-switch structures are considered and compared, such as constant-sized drain switch (CDS), constant-sized gate switch (CGS), constant-sized source switch (CSS), binary-weighted source switch (BSS), and constant size split-source switch (SSS). The comparator and the offset auto-calibration circuits are designed using the GlobalFoundry 0.13μm process. Then an offset trimming algorithm, which is written on MATLAB, is applied to these circuits. Afterwards, the results are collected and analyzed. A comparison of linearity and trimming range (TR) achieved with different trimming switch structures is performed to demonstrate advantages and disadvantages of each switch scheme. The results are also plotted in a histogram to show the normal distribution of each scheme. Finally, offset cancellation technique is implemented in an operational amplifier (Op Amp) circuit with further analysis and comparison to prove the methodology.</p>
dc.format.mimetype application/pdf
dc.identifier archive/lib.dr.iastate.edu/etd/17453/
dc.identifier.articleid 8460
dc.identifier.contextkey 15681443
dc.identifier.s3bucket isulib-bepress-aws-west
dc.identifier.submissionpath etd/17453
dc.identifier.uri https://dr.lib.iastate.edu/handle/20.500.12876/31636
dc.language.iso en
dc.source.bitstream archive/lib.dr.iastate.edu/etd/17453/Gong_iastate_0097M_17950.pdf|||Fri Jan 14 21:23:29 UTC 2022
dc.subject.disciplines Electrical and Electronics
dc.subject.keywords Analog
dc.subject.keywords Very Large Scale Integration
dc.title An offset auto-calibration technique with cost-effective implementation for comparator and operational amplifier
dc.type article
dc.type.genre thesis
dspace.entity.type Publication
relation.isOrgUnitOfPublication a75a044c-d11e-44cd-af4f-dab1d83339ff
thesis.degree.discipline Electrical Engineering
thesis.degree.level thesis
thesis.degree.name Master of Science
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