Behavioral modeling, functional modeling and simulation for both digital and analog systems are powerful tools of verification in the mixed-signal (analog and digital) circuit design process. Recently approved IEEE standard 802.3z 1000BASE-X (Gigabit Ethernet) physical layer represents such a mixed signal system. The 1000BASE-X represents a complex and challenging mixed-signal system that transfers data at very high speeds. The system is composed of a Physical Coding Sublayer (PCS) that is entirely digital and a Physical Media Access (PMA) sublayer that is a mixed-signal subsystem but is predominantly analog. In this work, the entire 100OBase-X mixed-signal system was modeled. The digital parts using Verilog[Superscript registered trademark symbol] and the analog parts using SpectreHDL[Superscript registered trademark symbol] (Spectre Hardware Description Language). The top-level integration of the mixed-signal system was achieved using SpectreVerilog[Superscript registered trademark symbol]. The entire physical layer was realized and verified in a 0.35[Mu] CMOS technology. The PCS sublayer was synthesized down to the gate level using Synopsys[Superscript registered trademark symbol].