Power efficient design methodology for sequential machines
dc.contributor.advisor | Chao, Liang-Fang | |
dc.contributor.author | Surti, Prasoonkumar B. | |
dc.date.accessioned | 2024-09-09T18:42:00Z | |
dc.date.available | 2024-09-09T18:42:00Z | |
dc.date.issued | 1996 | |
dc.description.abstract | Tinier and faster electronic components have been so far the most sought for, but battery technology has not been in pace. So in recent years, power has emerged as an important design goal, besides area and speed. Lap-top computers, Personal Digital Assistants (PDAs), cellular phones, pagers and some medical equipment have enjoyed considerable success in the consumer electronics market. Since these products derive electrical energy from the battery, a limited source of energy, every bit of power saving in these products will result in prolonged battery life. Hence, the strong motivation for low power design is quite justified. Proposed work in this thesis is aimed to address the issue of power estimation making wise use of behavioral information and low power design of controllers (Finite State Machines). | |
dc.identifier.uri | https://dr.lib.iastate.edu/handle/20.500.12876/7vdXmd0v | |
dc.language.iso | en | |
dc.title | Power efficient design methodology for sequential machines | |
dc.type | thesis | en_US |
dc.type.genre | thesis | en_US |
dspace.entity.type | Publication | |
relation.isDegreeOrgUnitOfPublication | a75a044c-d11e-44cd-af4f-dab1d83339ff | |
thesis.degree.department | Department of Electrical and Computer Engineering | |
thesis.degree.discipline | Computer Engineering | |
thesis.degree.level | Masters | |
thesis.degree.name | Master of Science |
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