An analog waveform recording system has been developed in which the input is sampled and stored at a high rate for a limited period of time. The analog samples are then retrieved at a much slower rate and digitized by a slow ADC. These types of analog memory based waveform recording systems are useful in applications where a continuous digitization of the input signals is not required. Traditional examples of such applications include pulse shape recording (high-energy physics experiments) and laboratory experimentation (oscilloscopes). The intended applications are very high-speed transient digitizers for use in adaptive equalizers and for monitoring inter-chip gigabit communications. These systems exploit the fact that slower ADCs are cheaper and more power efficient than high speed ADCs. A prototype has been implemented based upon a pair of 128 stage analog memories in a digital 0.25um, 2.5V bulk CMOS process. In an analog memory design, the challenge is to produce a uniform and linear response over a large number of memory cells. Various memory calibration and correction procedures are studied and implemented. At 1GHz sampling and with simple linear calibration, the measured full-scale non-linearity is [Less than or equal to symbol] 0.3% and the measured SNDR is 33dB for a 0.5Vp-p 10MHz input.