Distributed real-time operating system (DRTOS) modeling in SpecC

dc.contributor.advisor Diane T. Rover
dc.contributor.author Zhang, Ziyu
dc.contributor.department Department of Electrical and Computer Engineering
dc.date 2018-08-24T18:38:20.000
dc.date.accessioned 2020-06-30T07:31:52Z
dc.date.available 2020-06-30T07:31:52Z
dc.date.copyright Sun Jan 01 00:00:00 UTC 2006
dc.date.issued 2006-01-01
dc.description.abstract <p>System level design of an embedded computing system involves a multi-step process to refine the system from an abstract specification to an actual implementation by defining and modeling the system at various levels of abstraction. System level design supports evaluating and optimizing the system early in design exploration.;Embedded computing systems may consist of multiple processing elements, memories, I/O devices, sensors, and actors. The selection of processing elements includes instruction-set processors and custom hardware units, such as application specific integrated circuit (ASIC) and field programmable gate array (FPGA). Real-time operating systems (RTOS) have been used in embedded systems as an industry standard for years and can offer embedded systems the characteristics such as concurrency and time constraints. Some of the existing system level design languages, such as SpecC, provide the capability to model an embedded system including an RTOS for a single processor. However, there is a need to develop a distributed RTOS modeling mechanism as part of the system level design methodology due to the increasing number of processing elements in systems and to embedded platforms having multiple processors. A distributed RTOS (DRTOS) provides services such as multiprocessor tasks scheduling, interprocess communication, synchronization, and distributed mutual exclusion, etc.;In this thesis, we develop a DRTOS model as the extension of the existing SpecC single RTOS model to provide basic functionalities of a DRTOS implementation, and present the refinement methodology for using our DRTOS model during system level synthesis. The DRTOS model and refinement process are demonstrated in the SpecC SCE environment. The capabilities and limitations of the DRTOS modeling approach are presented.</p>
dc.format.mimetype application/pdf
dc.identifier archive/lib.dr.iastate.edu/rtd/1383/
dc.identifier.articleid 2382
dc.identifier.contextkey 6093888
dc.identifier.doi https://doi.org/10.31274/rtd-180813-134
dc.identifier.s3bucket isulib-bepress-aws-west
dc.identifier.submissionpath rtd/1383
dc.identifier.uri https://dr.lib.iastate.edu/handle/20.500.12876/67346
dc.language.iso en
dc.source.bitstream archive/lib.dr.iastate.edu/rtd/1383/1439846.PDF|||Fri Jan 14 20:02:03 UTC 2022
dc.subject.disciplines Electrical and Electronics
dc.subject.keywords Electrical and computer engineering
dc.subject.keywords Computer engineering
dc.title Distributed real-time operating system (DRTOS) modeling in SpecC
dc.type thesis en_US
dc.type.genre thesis en_US
dspace.entity.type Publication
relation.isOrgUnitOfPublication a75a044c-d11e-44cd-af4f-dab1d83339ff
thesis.degree.level thesis
thesis.degree.name Master of Science
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