The architecture of conventional (von Neumann) computers, with a single processor and millions of memory units, is inherently inefficient for most applications. In fact, while the processor is extremely busy all the time, only a very small portion of the memory is active. Larger computers are even less efficient, since the ratio of processing power to memory is even smaller and the length of computation is dominated by the ever increasing time required to move data between processor and memory. To overcome this so-called “von Neumann bottleneck,” a new kind of computer, called the “Connection Machine” (CM) has been designed, with a larger number (thousands) of processors, connected in a programmable way, in the framework of a fixed physical wiring scheme [1]. This parallelism allows an opportunity to efficiently reformulate the problem to be studied and modify the approach [2-4]. Currently, the memory available is limited and requires some care in programming. This limitation should decrease with new CM-type machines.