Staged Tuning: A Hybrid (Compile/Install-time) Technique for Improving Utilization of Performance-asymmetric Multicores

dc.contributor.author Sondag, Tyler
dc.contributor.author Rajan, Hridesh
dc.contributor.department Department of Computer Science
dc.date 2018-02-16T16:01:40.000
dc.date.accessioned 2020-06-30T01:57:04Z
dc.date.available 2020-06-30T01:57:04Z
dc.date.issued 2015-06-29
dc.description.abstract <p>Emerging trends towards performance-asymmetric multicore processors (AMPs) are posing new challenges, because for effective utilization of AMPs, code sections of a program must be assigned to cores such that the resource needs of the code sections closely match the resources available at the assigned core. Computing this assignment can be difficult especially in the presence of unknown or many target AMPs. We observe that finding a mapping between the code segment characteristics and the core characteristics is inexpensive enough, compared to finding a mapping between the code segments and the cores, that it can be deferred until installation-time for more precise decision. We present staged tuning which combines extensive compile time analysis with intelligent binary customization at install-time. Staged tuning is like staged compilation, just for core assignment. Our evaluation shows that staged tuning is effective in improving the utilization of AMPs. We see a 23% speedup over untuned workloads.</p>
dc.identifier archive/lib.dr.iastate.edu/cs_techreports/372/
dc.identifier.articleid 1371
dc.identifier.contextkey 7272049
dc.identifier.s3bucket isulib-bepress-aws-west
dc.identifier.submissionpath cs_techreports/372
dc.identifier.uri https://dr.lib.iastate.edu/handle/20.500.12876/20207
dc.source.bitstream archive/lib.dr.iastate.edu/cs_techreports/372/staged_tuning.pdf|||Fri Jan 14 23:50:16 UTC 2022
dc.subject.disciplines Programming Languages and Compilers
dc.subject.disciplines Software Engineering
dc.subject.keywords asymmetric multicore processors
dc.subject.keywords staged tuning
dc.title Staged Tuning: A Hybrid (Compile/Install-time) Technique for Improving Utilization of Performance-asymmetric Multicores
dc.type article
dc.type.genre article
dspace.entity.type Publication
relation.isAuthorOfPublication 4e3f4631-9a99-4a4d-ab81-491621e94031
relation.isOrgUnitOfPublication f7be4eb9-d1d0-4081-859b-b15cee251456
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